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CY22050的技术资料
CY22050的技术资料
来源：
香港世玮科技有限公司
发布日期：2009/4/21 19:45:51
CY22050的产品特征：
• Integrated phase-locked loop (PLL)
• Commercial and Industrial operation
• Flash-programmable
• Field-programmable
• Low-skew, low-jitter, high-accuracy outputs
• 3.3V operation with 2.5V output option
• 16-lead TSSOP
CY22050的技术参数：
CY22050的产品描述：
The CY22050 is the next-generation programmable FTG (frequency timing generator) for use in networking, telecommunication,datacom, and other general-purpose applications.
The CY22050 offers up to six configurable outputs in a 16-pin TSSOP, running off a 3.3V power supply. The on-chip reference oscillator is designed to run off an 8–30-MHz crystal,or a 1–133-MHz external clock signal.
The CY22050 has a single PLL driving 6 programmable output clocks. The output clocks are derived from the PLL or the reference frequency (REF). Output post dividers are available for either. Four of the outputs can be set as 3.3V or 2.5V, for use in a wide variety of portable and low-power applications.
• Integrated phase-locked loop (PLL)
• Commercial and Industrial operation
• Flash-programmable
• Field-programmable
• Low-skew, low-jitter, high-accuracy outputs
• 3.3V operation with 2.5V output option
• 16-lead TSSOP
CY22050的技术参数：
| Parameter | Description | Min. | Max. | Unit |
| VDD | Supply Voltage | –0.5 | 7.0 | V |
| VVDDL | I/O Supply Voltage | –0.5 | 7.0 | V |
| TS | Storage Temperature[3] | –65 | 125 | °C |
| TJ | Junction Temperature | 125 | °C | |
| Package Power Dissipation—Commercial Temp | 450 | mW | ||
| Package Power Dissipation—Industrial Temp | 380 | mW | ||
| Digital Inputs | AVSS – 0.3 | AVDD + 0.3 | V | |
| Digital Outputs referred to VDD | AVSS – 0.3 | AVDD + 0.3 | V | |
| Digital Outputs referred to VDDL | AVSS – 0.3 | VDDL +0.3 | V | |
| ESD | Static Discharge Voltage per MIL-STD-833, Method 3015 | 2000 | V |
CY22050的产品描述：
The CY22050 is the next-generation programmable FTG (frequency timing generator) for use in networking, telecommunication,datacom, and other general-purpose applications.
The CY22050 offers up to six configurable outputs in a 16-pin TSSOP, running off a 3.3V power supply. The on-chip reference oscillator is designed to run off an 8–30-MHz crystal,or a 1–133-MHz external clock signal.
The CY22050 has a single PLL driving 6 programmable output clocks. The output clocks are derived from the PLL or the reference frequency (REF). Output post dividers are available for either. Four of the outputs can be set as 3.3V or 2.5V, for use in a wide variety of portable and low-power applications.
